# What is the minimum sampling rate in ADC in Arduino due?

I am looking for a very low frequency application like below 300Hz. What is the minimum sampling rate in Arduino due? I am very new to this. I see in the datasheet that max sampling rate is 20MHz.

• The minimum sampling rate is one sample per eternity.
– Majenko
Apr 19 at 21:19
• Don't you mean maximum sample frequency instead of minimum? Apr 19 at 21:31
• No i meant Like maximum sampling rate is there a minimum sampling rate? Apr 19 at 21:44
• Why should there be a minimum sampling rate? You trigger each sample yourself. The sample rate gets smaller when you wait longer between the samples. You can wait as long as you like, so you can get a samling rate arbitrarily small. No minimum limit there Apr 19 at 22:24
• Think about it: if you configure the Due to sample at 20Msps but only enable the ADC long enough to perform just one sample, what is the sample rate?
– Majenko
Apr 19 at 23:17

There is no "minimum" sampling rate.

You can better understand why that would be if you first understand how Successive Approximation ADCs operate.

An SAR ADC is simply a small capacitor, a DAC, and a comparator - along with a number of digital switches. When you perform a sampling the capacitor is first connected to the IO pin for an amount of time. The capacitor then charges up to the level of the incoming signal. Then the capacitor is disconnected from the IO pin and instead connected to the comparator. The DAC is then used to generate a sequence of voltages which the comparator then compares against the voltage in the capacitor - one voltage for each bit of resolution.

The maximum sampling rate is defined by how long the capacitor takes to be charged up by the incoming voltage. A bigger capacitor will take longer to charge up and thus give you a lower maximum sampling speed. A smaller capacitor charges faster, giving you higher sampling speeds.

However there is a big caveat: a smaller capacitor holds its charge for a shorter length of time, so getting an accurate reading from it when you have to hold the voltage for a number of cycles while you do successive comparisons can be hard. For this reason it's common to reduce the sampling resolution for higher sampling speeds: switch in a smaller capacitor, but take less time to sample it with less bits of data.

So from that it stands to reason that there is a minimum amount of time that you want the capacitor connected to the IO pin, and a predefined amount of time required to perform the comparisons, but there is no lower limit on how long the capacitor can be connected to the IO pin - it will just track the voltage changes for a while until the moment it's switched to conversion mode and the current voltage is captured (successive approximation ADCs are also known as sample-and-hold for this reason). And of course there is no requirement to immediately start a new sampling of the IO pin immediately you have finished a conversion. You can wait any amount of time before triggering a new ADC conversion. Seconds, weeks, decades...

This of course is all for manual triggering of the ADC. If you want automatic triggering from one of the internal timers then the minimum sampling speed will be whatever you can configure the timer to. And we can't tell you that, since timers can be configured to run from different clock sources, including your own external clock signal running at whatever speed you like.

So for automatic conversions you should not be looking at the ADC, other than to find what clock sources and interrupts can be used to trigger a conversion, and instead look at the relevant timer sections in the datasheet to work out what frequency you can configure those for to suit your needs.