> the ADC is LTC1859 and triggers on the slave select falling edge.

No, it doesn't. Here is a link to [its datasheet][]. It has a pin
labeled CONVST, for “_conversion start_”. According to the section _Pin
functions_, “This active high signal starts a conversion on its rising
edge.”

If you want your sampling to be at 2 kHz with cycle-accurate
timings, you have to send to this pin a train of pulses which are at
least 40 ns wide and have a period of 500 µs, i.e.
8,000 CPU cycles. This can be done with any of the three timers of
the Uno. For example, you can set Timer 2 to repeatedly count from
0 to 124 with a prescaler of 64 (untested code):

    // Configure Timer 2 for PWM on pin OC2B = digital 3.
    OCR2A  = 125 - 1;     // period = 64 * 125 CPU cycles = 500 us
    OCR2B  =   2 - 1;     // high for 64 *   2 CPU cycles =   8 us
    TCCR2A = _BV(COM2B1)  // non-inverting PWM on pin OC2B
           | _BV(WGM20)   // mode 7: fast PWM, TOP = OCR2A
           | _BV(WGM21);  // ditto
    TCCR2B = _BV(WGM22)   // ditto
           | _BV(CS22);   // clock at F_CPU/64

Note that the timer will also set a flag when the pulse is done, at
which time you can start the data transfer. You would then start your
data-taking loop with:

    // Wait for the output compare flag.
    loop_until_bit_is_set(TIFR2, OCF2B);

    // Clear the flag.
    TIFR2 |= _BV(OCF2B);

    // Now transfer the data.
    ...

[its datasheet]: http://cds.linear.com/docs/en/datasheet/185789fb.pdf