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Is it possible to bit-bang multiple SPI ADC, 12 bit sampled at 100khz? This would translate to a GPIO speed of about 1.2 Mhz.

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    Actually 2.4Mhz, since the clock pin needs to be LOW and HIGH every SPI-clock-cycle. The DUE has 4 hardware SPI busses. Can't you use those? – Gerben Jan 4 at 19:39
  • I want to get 10 at the same time. The control signal will be tied to all the ADC. – FourierFlux Jan 4 at 19:51
  • I'm not clear how you are planning on getting 10 ADC readings at the same time using SPI. It might help if you would explain what you're doing vs. just asking this out-of-context question. – jwh20 Jan 4 at 20:19
  • Easy, the master control signal and clock will be split to every ADC and the input will be bit banged using GPIO pin, assuming GPIO is fast enough. – FourierFlux Jan 4 at 20:21
  • You can edit that detail into your question. – timemage Jan 4 at 21:37

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