I just finished a reading a couple of online guides on how to use timer registers with pulse width modulation, so I'm still new to its concept. When I looked in the ATMEGA328 specification sheet, I see this table:
The column that I'm not completely clear on is the "Update of OCR1x at". I circled row 14 as an example. If you're operating in mode 14 (ie. setting WGM 13, 12 and 11 to high), then you'll be in Fast PWM. By setting a value for ICR1, you are effectively setting the TOP value, which will control the period of the pulse waves. And the overflow flag on the timer will be set when the timer reaches the TOP value.
So does "Update of OCR1x at" mean that only when when the pulse wave form has reached the value of BOTTOM (or the end of a period), that's when the value of OCR1x will be passed on to the OCx pins if COMx bits are set?