The Wire library and an ATTiny88 MCU

Question

This is the MCU: http://www.microchip.com/wwwproducts/en/ATtiny88 - it advertises a hardware I2C interface, but I am struggling with it. It is mounted on my own board (which worked fine if I dropped an ATMega instead).

edited - prev screencapture were from an ungrounded logic analyzer

First tried the Femtocow ATTiny - it has complained about no Wire library at the #include Wire.h line. So i went into C:\Program Files\Arduino\hardware\arduino\avr\libraries, grabbed the Wire folder and copied it into C:\Program Files\Arduino\libraries. Compiled fine, loaded the binary with avrdude, got a few first TWI communication fine, then it started trashing.

Second attempt was with the cores from Drazzy ATTinycore which came with its own Wire library. Compiled fine, loaded the binary and got the same behaviour.

This is how the messed up I2C line looks in both cases. Starts fine, then appears to go wonky, after a few of these wonky bursts the lines go silent. Also, in spite of having changed the frequency to both 100 and 400 kHz i have this weird 1.953 kHz clock...

#define F_TWI             400000L
//#define F_TWI             100000L

....

  Wire.begin(); // Initiate the Wire library
  Wire.setClock(F_TWI);

I am using Arduino 1.8.2. Anything gives ?

Answer 1

My issue has ultimately come from some memory differences between the ATTiny88 and the ATMega88 - the latter has twice as much SRAM - 1 kB. There normally have not been any warnings on this running out of RAM issue except for once - can't recall how but Arduino IDE did warn.

However, until I got to the bottom of it there have been some digging that had to be done. Like getting used to the programmer either working as expected, or erroring and failing, or erroring and not failing. Then there are the, sometimes changing, folders into which Arduino IDE outputs its files. Also there are non-working board configurations causing the used Wire libraries to issue read and write requests followed by just a NAK. Oh, and not to forget about the messed up signals - turns out they weren't messed up, just the logic analyzer was.