You have misunderstood how shift registers work - and one of the main reasons they exist in the first place.
Shift register ICs have a common 'latch' pin which latches the data present at the input of the cell into the cell, thus updating the output. Some ICs also offer an "output enable", which switches the outputs to a high-impedance state irrespective of the values in the cells - this might not be useful in your case, but the feature exists.
With a serial-to-parallel shift register you can shift in as many bits as you want, at whatever rate you choose, and the outputs will never change until you trigger a rising edge on the LATCH pin.
How a (latching) Shift Register works:
You have eight spaces within the register:
___ ___ ___ ___ ___ ___ ___ ___
[DATA_IN]-->|___|--|___|--|___|--|___|--|___|--|___|--|___|--|___|-->[DATA_OUT]
BIT0 BIT7
The 'spaces' are chained together; at one end of the chain is the DATA_IN pin and at the other end is the DATA_OUT pin.
Every time there is a rising edge on the CLOCK pin, data is shifted down the chain from DATA_IN to DATA_OUT, one space at a time. For example, if the state of the 'spaces' is as the left hand column, then upon the rising edge of the CLOCK pin the spaces will change to the values in the right hand column:
DATA_IN PIN = 1 -> C -> ?
BIT0 'SPACE' = 0 -> L -> 1
BIT1 'SPACE' = 1 -> O -> 0
BIT2 'SPACE' = 1 -> C -> 1
BIT3 'SPACE' = 0 -> K -> 1
BIT4 'SPACE' = 0 -> E -> 0
BIT5 'SPACE' = 1 -> D -> 0
BIT6 'SPACE' = 1 -> G -> 1
BIT7 'SPACE' = 0 -> E -> 1
You will see that BIT(n) changes to the value of BIT(n-1), with BIT0 changing to the value of DATA_IN. The DATA_OUT pin is used to daisy-chain multiple shift registers together. The important thing to note here is that the outputs do not change without a rising edge on the LATCH pin. You can pulse CLOCK as many times as you want, with whatever values on DATA_IN, and the outputs will not change. Ever.
When you finally trigger the LATCH pin, the value in each 'space' is latched into a second row of 'spaces' - these represent the outputs. On a latch trigger, the outputs therefore change to the values of the last eight bits that were shifted into the DATA_IN pin. For example:
OUTPUT = 11001010
SHIFT IN "01101111" (starting with RHS first)
TRIGGER RISING EDGE ON 'LATCH' PIN
OUTPUT = 01101111
SHIFT IN "11110000110011001100"
TRIGGER RISING EDGE ON 'LATCH' PIN
OUTPUT = 11110000 i.e. the LAST EIGHT BITS that were shifted in
SHIFT IN "10"
TRIGGER RISING EDGE ON 'LATCH' PIN
OUTPUT = 10111100 again the LAST EIGHT BITS that were shifted in
It is generally never the case with a serial-in-parallel-out register that you would ever shift in less that eight bits at a time, so the last example is only there to illustrate the functioning of the IC.
